Vertical-type non-volatile memory devices
US8492828B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2012 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Aug 6, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/547
Abstract
In a semiconductor device, and a method of manufacturing thereof, the device includes a substrate of single-crystal semiconductor material extending in a horizontal direction and a plurality of interlayer dielectric layers on the substrate. A plurality of gate patterns are provided, each gate pattern being between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of single-crystal semiconductor material extends in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns, a gate insulating layer being between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.