Memory device and program method thereof
US8493782B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 16, 2009 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Oct 30, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a flash memory system and a driving method thereof. A flash memory device according to an embodiment of the present invention includes a memory cell array including a plurality of memory cells, and a control logic. The control logic performs control for one-bit information to be stored in the plurality of memory cells. The control logic controls storing data in the plurality of memory cells multiple times without an erasion operation. Accordingly, the flash memory device does not execute an erasion operation, increasing an operation speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.