Method and system for bandwidth calibration for a phase locked loop (PLL)
US8494085B2 · kind B2 · utility
2Cited by
2References
18Claims
0Family size
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Inventor
Key dates
| Filing date | Jun 28, 2010 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Sep 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output radio frequency (RF) synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.