Controller for optimizing throughput of read operations
US8495332B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2009 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Feb 1, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller, techniques, systems, and devices for optimizing throughput of read operations in flash memory are disclosed. Various optimizations of throughput for read operations can be performed using a controller. In some implementations, read operations for a multi-die flash memory device or system can be optimized to perform a read request with a highest priority (e.g., an earliest received read request) as soon as the read request is ready. In some implementations, the controller can enable optimized reading from multiple flash memory dies by monitoring a read/busy state for each die and switching between dies when a higher priority read operation is ready to begin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.