Generating a primary BIOS code memory address and a recovery BIOS code memory address, where the recovery BIOS service code is loaded when the primary BIOS code fails to execute
US8495349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2008 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Aug 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Administering computer processor execution of BIOS code that includes a primary BIOS code and a recovery BIOS code stored in ROM, the ROM operatively coupled to a control module and the processor, where administering processor execution of the BIOS code includes determining, by the control module, a size of the ROM; generating, by the control module in dependence upon the size of the ROM, an address for the primary BIOS code and an address for the recovery BIOS code; starting, by the control module, operation of the processor for execution of the primary BIOS code including providing, to the processor, the address for the primary BIOS code; and if executing the primary BIOS code fails, restarting, by the control module, operation of the processor for execution of the recovery BIOS code including providing, to the processor, the address for the recovery BIOS code to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.