Insert for carrier board of test handler
US8496113B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2008 |
| Grant date | Jul 30, 2013 |
| Priority date | — |
| Expiry date | Sep 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2893
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An insert for a carrier board of a test handler is disclosed. In a first aspect, the latch block applying to the insert is detachably coupled to the insert body. The latch block can be reused, and thus this reduces wastage of resources and eliminates the insert replacement fee. In a second aspect, the insert pocket having hooks is detachably coupled to the insert body. The insert body can be reused. The latch unit is installed to the insert pocket, so that the damaged latch unit can be easily replaced. The insert forms a plurality of holes in the bottom of the loading part thereof, to expose the leads of the semiconductor devices through the holes downwardly. Thus, the insert can load semiconductor devices regardless of the dimensions of the semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.