Patent · US Active

Double gate transistor and method of fabricating the same

US8502289B2 · kind B2 · utility

4Cited by
1References
57Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 13, 2011
Grant dateAug 6, 2013
Priority date
Expiry dateDec 13, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/792

Abstract

The present invention discloses a double gate transistor and a method of fabricating said transistor, said transistor comprising: a semiconductor layer on a substrate; a fin structure formed in said semiconductor layer, said fin structure having two end portions for forming source and drain regions and a middle portion between said two end portions for forming a channel region, said middle portion including two opposed side surfaces perpendicular to a substrate surface; a first gate dielectric layer and a first gate disposed on one side surface of said middle portion; and a second gate dielectric layer and a second gate disposed on the other side surface of said middle portion.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.