Double layer metal (DLM) power MOSFET
US8502313B2 · kind B2 · utility
1Cited by
7References
23Claims
0Family size
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Key dates
| Filing date | Apr 21, 2011 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Feb 1, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/655
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This document discusses, among other things, a semiconductor device including a first metal layer coupled to a source region and a second metal layer coupled to a gate structure, wherein at least a portion of the first and second metal layers overlap vertically.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.