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US8502559B2 · kind B2 · utility
1Cited by
3References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 17, 2011 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Nov 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit has an input configured to receive a periodic signal having a first value. First circuitry is provided to generate a pulse when said periodic signal has a rising edge and a pulse when said periodic signal has a falling edge. Second circuitry is configured to receive said pulses and responsive thereto to provide an output signal, said output signal having a same duty cycle as said input signal and having a second value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.