Timing adjustment circuit, solid-state image pickup element, and camera system
US8502578B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2012 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Nov 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0041
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A timing adjustment circuit includes at least one data line; a phase synchronization circuit that includes a plurality of oscillation delay elements which oscillate an oscillation signal, and that is configured to oscillate the oscillation signal by synchronizing a phase of a feedback clock with a phase of a reference clock; at least one delay circuit that includes a delay element which is disposed on the data line and which is equivalent to one of the plurality of oscillation delay elements, and that is configured to delay data which is to be transmitted on the data line; and a delay adjustment unit configured to adjust an amount of delay of the delay element of the delay circuit in accordance with a signal associated with oscillation of the phase synchronization circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.