Balanced debounce circuit with noise filter for digital system
US8502593B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2005 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Jul 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1254
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit and method for debouncing an electrical signal are disclosed. A representative embodiment of the present invention may be set to remove (i.e., filter) noise or glitches in the low and high portions of an input signal, where the width of the noise or glitches while in the high or low state may be set using a programming interface. The filtering is done in a manner that results in a clean, debounced output signal having a low portion approximately equal to the low portion of the input signal, and a high portion approximately equal to the high portion of the input signal. Noise or glitches of less than programmable high or low glitch widths are filtered from the input signal and do not appear in the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.