Layout method for differential amplifier and layout using the same
US8502604B2 · kind B2 · utility
2Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 21, 2011 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Oct 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45674
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifier layout includes a current mirror having a first transistor, a second transistor, and a third transistor. The current mirror receives a first power supply through the first transistor. The second transistor is part of a reference current branch and the third transistor is part of a mirror current branch. The first transistor comprises a first group of fingers disposed adjacent one side of the second transistor and a second group of fingers disposed adjacent one side of the third transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.