Packaging and testing of multiple MEMS devices on a wafer
US8507297B2 · kind B2 · utility
39Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2010 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Apr 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B26/0833
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A wafer containing a plurality of electro-optical devices, each device being enclosed in chamber that has a translucent cover. An X-Y matrix of pairs of interconnections on the wafer are connected to the circuitry of the electro-optical devices for addressing the electro-optical devices. The pairs of interconnections extend outside of the chambers enclosing the devices to testing areas on the periphery of the wafer. Testing is done by signals applied through the interconnections while simultaneously exposing the devices to light through the translucent covers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.