Semiconductor light emitting device including graded region
US8507929B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2008 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Mar 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/81
Abstract
One or more regions of graded composition are included in a III-P light emitting device, to reduce the Vf associated with interfaces in the device. In accordance with embodiments of the invention, a semiconductor structure comprises a III-P light emitting layer disposed between an n-type region and a p-type region. A graded region is disposed between the p-type region and a GaP window layer. The aluminum composition is graded in the graded region. The graded region may have a thickness of at least 150 nm. In some embodiments, in addition to or instead of a graded region between the p-type region and the GaP window layer, the aluminum composition is graded in a graded region disposed between an etch stop layer and the n-type region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.