Transmitter with reduced power consumption and increased linearity
US8509300B2 · kind B2 · utility
2Cited by
6References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 7, 2008 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Sep 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The application refers to an apparatus comprising, a signal generator (102, 102a) configured to generate a signal, a first pulse width modulating unit (106) configured to modulate the signal, an amplifier unit (110) configured to amplify the modulated signal, a feedback loop path (108a) configured to correct the modulated signal using an error signal, wherein the apparatus comprises a second pulse width modulating (108) unit configured to modulate the error signal onto the modulated signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.