Protocol resolution device and method employing the same
US8510477B2 · kind B2 · utility
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Key dates
| Filing date | Oct 11, 2011 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Mar 24, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A protocol resolution device electrically connected to a central processing unit (CPU) includes a signal controller to receive communication protocol from the CPU, a signal input module, and display module. The signal input module provides an electrical signal to the signal controller. The signal controller decodes the communication protocol from the CPU and stores the decoded communication protocol, the signal controller selectively accesses and calls up the decoded communication protocol according to the electrical signal, and transmits the decoded communication protocol to the display module for display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.