Patent · US Active

Synchronization between devices

US8514098B2 · kind B2 · utility

6Cited by
8References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 17, 2010
Grant dateAug 20, 2013
Priority date
Expiry dateApr 24, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2007/047
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

The present disclosure relates to a method to determine a clock signal when separate clocks are used. In one embodiment, a disciplined clock system comprising an update subsystem and a synthesis subsystem is provided. A first clock phase estimate is provided to the update subsystem and used, along with the update subsystem, to determine a frequency offset estimate and a phase offset estimate. The clock signal is determining using the frequency offset estimate, the phase offset estimate, and the synthesis subsystem. Alternatively, two clocks can be synchronized by generating a signal associated with a first clock; modulating the signal; transmitting the modulated signal; receiving the modulated signal by a receiver associated with a second clock; correlating the received signal; determining the time of arrival of the received signal; determining the time difference between the two clocks; and synchronizing the two clocks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.