Signal processing circuit and method thereof
US8515365B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2011 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Feb 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B17/11
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A signal processing circuit is disclosed, comprising a first node for coupling with a first antenna, a second node for coupling with a second antenna, a third node for receiving a first signal from a transmitting circuit, a fourth node for coupling with a receiving circuit, a signal dividing circuit, a phase shifting circuit, and a signal combining circuit. The signal dividing circuit divides the first signal into a second signal and a third signal, and transmits the second signal to the first antenna. The phase shifting circuit shifts the phase of the third signal to generate a fourth signal for canceling at least part of a coupled signal between the third node and the fourth node. The signal combining circuit combines the fourth signal and a fifth signal received from the second antenna, and transmits the combined signal to the receiving circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.