Patent · US Active

Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor

US8516304B2 · kind B2 · utility

4Cited by
15References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 8, 2010
Grant dateAug 20, 2013
Priority date
Expiry dateMar 18, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/2294
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefore. In one embodiment, an integrated circuit includes a logic analyzer having a first input receiving a plurality of signals and an output for providing an indication of a detection, by the logic analyzer, of at least one trigger event; and a built in self test block having a first input for receiving one or more of the signals appearing at the first input of the logic analyzer, a second input coupled to the output of the logic analyzer for selectively enabling the BIST block, the BIST block generating and maintaining a signature based upon the first and second inputs thereof.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.