Pre-interleaving for forward error correction codes
US8516333B1 · kind B1 · utility
9Cited by
0References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2010 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Sep 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/353
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems, devices, and methods are disclosed herein using a pre-interleaving process to be performed at the transmitter. Data is rearranged at the transmitter, and the rearranged data is transmitted over the communication channel in an order that is more suitable for parallel processing at the decoder. Because processing at the transmitter is bit-wise rather than the multi-bit, soft-decision information at the decoder, pre-interleaving may reduce use system resources when compared to a re-interleaving process at the decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.