Patent · US Active

Latch arrangement for an electronic digital system, method, data processing program, and computer program product for implementing a latch arrangement

US8516336B2 · kind B2 · utility

2Cited by
7References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 26, 2011
Grant dateAug 20, 2013
Priority date
Expiry dateFeb 9, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/08
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An improved latch arrangement for an electronic digital system is disclosed. The latch arrangement comprises a certain number of standard latches configured as configuration-switch latches which are modified only by shift operation and/or during Error Checking and Correction (ECC) action, and a corresponding number of standard latches configured as Error Checking and Correction (ECC) latches storing Error Checking and Correction (ECC) bit data used to check latch data of said configuration-switch latches.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.