Patent · US Active

Method and system for repartitioning a hierarchical circuit design

US8516417B2 · kind B2 · utility

2Cited by

10References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Elmar Gaugler · Eppelheim, DE
Wilhelm Haller · Winnenden, DE
Friedhelm Kessler · Eppelheim, DE

Key dates

Filing date	Jul 7, 2010
Grant date	Aug 20, 2013
Priority date	—
Expiry date	Jan 15, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/394
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to a method and a system for repartitioning a formalized hardware description of a hierarchically structured electronic circuit design unit comprising a plurality of macros in terms of latch macros and combinatorial macros. In a first step, each macro is dissected into latch macros and signal cones in such a way that Subsequently, combinatorial macros are created by merging combinatorial signal cones along unit signal paths.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.