Vertical power budgeting and shifting for three-dimensional integration
US8516426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2011 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Aug 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06565
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for managing power distribution on a three-dimensional chip stack having two or more strata, a plurality of vertical power delivery structures, and multiple stack components. At least two stack components are on different strata. Operating modes are stored that respectively have different power dissipations. A respective effective power budget is determined for each of the at least two stack components based on respective ones of the operating modes targeted therefor, and power characteristics and thermal characteristics of at least some of the stack components inclusive or exclusive of the at least two stack components. The respective ones of the plurality of operating modes targeted for the at least two stack components are selectively accepted or re-allocated based on the respective effective power budget for each of the at least two stack components, power constraints, and thermal constraints. The power constraints include vertical structure electrical constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.