Storing contexts for thread switching
US8516496B2 · kind B2 · utility
1Cited by
9References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2005 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Dec 8, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device comprising decode logic that decodes instructions and a stack coupled to the decode logic. A group of instructions causes the decode logic to push onto the stack, after halting processing of a first thread at a switch point and prior to processing a second thread, a minimum amount of information needed to resume execution of the first thread at the switch point and not information not needed to resume execution of the first thread at the switch point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.