Battery pack, semiconductor integrated circuit, remaining capacity correction method, and storage medium
US8519716B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 8, 2010 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Nov 2, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A battery pack includes a voltage detection part configured to detect the voltage of a battery unit including multiple chargeable and dischargeable secondary cells; a current detection part configured to detect a current flowing through the battery unit; a dischargeable capacity calculation part configured to calculate the dischargeable capacity of the battery unit based on the current detected by the current detection part; and a capacity correction part configured to correct the remaining capacity of the battery unit, the remaining capacity including the dischargeable capacity calculated by the dischargeable capacity calculation part, wherein the capacity correction part is configured to correct the remaining capacity based on an estimated dischargeable capacity calculated from the relationship between a preset predetermined voltage and the drop rate of the voltage of the battery unit, in response to the voltage of the battery unit becoming less than or equal to a predetermined threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.