Patent · US Active

Method and system for impedance measurement in an integrated Circuit

US8519720B2 · kind B2 · utility

0Cited by

5References

25Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Roland Frech · Esslingen am Neckar, DE
Jochen Supper · Herrenberg, DE
Thomas-Michael Winkel · Eppelheim, DE

Key dates

Filing date	Apr 15, 2011
Grant date	Aug 27, 2013
Priority date	—
Expiry date	Feb 23, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/3004
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A method for determining a power supply impedance profile (|Z(f)|) at a predetermined load location within an electronic system. A repetitive activity (such as a modulated clock tree signal) is applied in the load location, and the local power supply voltage (U(t)) caused by this repetitive activity is measured. Rather than measuring the corresponding current consumption (I(t)) caused by the repetitive activity, the current consumption is calculated analytically. The local power supply impedance profile (|Z(f)|) is calculated as the ratio of the frequency-domain voltage and current consumption magnitudes (|U(f)|, |I(f)|) of the measured power supply voltage (U(t)) and the calculated current consumption (I(t)).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.