System and method for background calibration of time interleaved analog to digital converters
US8519875B2 · kind B2 · utility
21Cited by
3References
22Claims
0Family size
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Key dates
| Filing date | Apr 10, 2012 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Apr 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments allow for background calibration of channel-to-channel mismatch errors. In certain embodiments calibration is accomplished by comparing the output of I-ADCs against the output of a reference ADC and correlating the difference to a known function to obtain a correction signal that can be used to correct channel-to-channel mismatch errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.