Managing cache coherence
US8521963B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2010 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Nov 17, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Managing data in a computing system comprising multiple cores includes: assigning a first set of data to caches within cores of a first subset of fewer than all of the cores in the computing system, and assigning a second set of data to caches within cores of a second subset of at least some remaining cores in the computing system not already assigned; and maintaining cache coherence among caches of respective cores in the first subset in response to data stored in at least one of the cores in the first subset being modified, and maintaining cache coherence among caches of respective cores in the second subset in response to data stored in at least one of the cores in the second subset being modified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.