Patent · US Active

Using status models with state guards in a computer system

US8522261B2 · kind B2 · utility

3Cited by

37References

18Claims

0Family size

Assignee

SAP AG · DE

Inventors

Frank Michael Kraft · Speyer, DE
Guenter Pecht-Seibert · Östringen, DE
Klaus Meyer · Ditzingen, DE
Bernhard Thimmel · Edingen-Neckarhausen, DE
Patrick Josef Bardroff · Leimen, DE
Gregor Schilberth · Heidelberg, DE
Wasim Sadiq · Brisbane, AU

Key dates

Filing date	Dec 28, 2006
Grant date	Aug 27, 2013
Priority date	—
Expiry date	Aug 3, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F8/24
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A design-time status schema model describes the progress of a data object through a computing process. The status schema model includes status variables, processing actions and constraints for performing actions. The status schema model also may describe permitted changes to a status variable in response to performing an action. At runtime, the status schema model is used to control processing performed by, or on, an instance of a data object corresponding to the status schema model.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.