System for reducing sensor area in a back side illuminated CMOS active pixel sensor
US8525284B2 · kind B2 · utility
0Cited by
2References
20Claims
0Family size
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Inventor
Key dates
| Filing date | Aug 24, 2011 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Jan 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
Abstract
The present invention relates to a backside illuminated (BSI) imager having a plurality of layers. A plurality of pixel sensors are positioned on a first layer of a substrate. Pixel select conductors are positioned on the substrate in front of the first layer. Pixel readout conductors including a plurality of output lines, pixel power conductors, and a ground conductor are positioned on the substrate in front of the pixel select conductors. A plurality of sample and hold capacitors coupled to the pixel output lines are positioned vertically and/or horizontally on the substrate in front of the ground conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.