Simultaneous checking of plural exit conditions loaded in table subsequent to execution of wait instruction for jitter free exit
US8527743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2010 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Mar 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprogrammable electronic device comprises a code memory storing a plurality of instructions. At least one instruction, when executed by the device, causes the device to enter into a wait state associated with a plurality of predefined wait state exit conditions. The device is configured to load into an electronic table each condition together with a corresponding code memory address of an instruction to be executed when the condition occurs; to execute, when is in the wait state, a wait instruction stored in the code memory and which, when executed, is such as to cause the device to check simultaneously the conditions loaded into said electronic table to detect if condition occurs; and, if a condition occurs, to exit from said wait state and to execute the instruction stored in the code memory at the code memory address loaded into the electronic table together with the condition that occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.