High speed hard LDPC decoder
US8527849B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2012 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Jun 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/3723
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The subject disclosure describes a method for performing error code correction, the method includes, loading a code word including a plurality of encoded bits into a memory array, initializing, into one or more of a plurality of memory units, a plurality of bits associated with each of the encoded bits, wherein the plurality of bits initialized for each of the encoded bits is based on a value of the associated encoded bit and wherein the plurality of encoded bits and the plurality of bits initialized for each of the encoded bits includes soft information. In certain aspects, the method further includes decoding the code word using the soft information and outputting the decoded code word from the memory array. A decoder and flash storage device are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.