Thin film transistor, display device, and manufacturing method for thin film transistor and display device
US8530899B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2010 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Dec 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/813
Abstract
The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.