Semiconductor device
US8530965B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2012 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Apr 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A semiconductor device comprising a substrate in which a first region and a second region are defined, a gate line which extends in a first direction and traverses the first region and the second region, a source region including a portion formed in the first region, a first part of a body region which is formed under the portion of the source region in the first region and has a first width, a first well which is formed under the first part of the body region in the first region and has a second width greater than the first width, a second part of the body region which is formed in the second region and has a third width, and a second well which is formed under the second part of the body region in the second region and has a fourth width smaller than the third width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.