High frequency signal processing device
US8531244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2011 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Jun 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B5/1265
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high frequency signal processing device is capable of carrying out high-accuracy modulation by a PLL circuit. A digital loop is configured in addition to an analog loop having, for example, a phase frequency detector, a charge pump circuit, and a loop filter. A digital calibration circuit is provided which searches for the optimal code set to a capacitor bank upon frequency modulation. Upon the search for the optimal code, a calibration controller first sets a division ratio based on a center frequency to a divider and determines the value of a voltage control signal using the analog loop. Then, the loop filter holds the value of the voltage control signal therein, and a division ratio corresponding to a “center frequency+modulated portion” is set to the divider, thereby operating the digital loop. The optimal code is obtained by a convergent value of the digital loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.