Semiconductor memory device and an operating method thereof
US8531879B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2011 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Dec 6, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device including a flash memory that includes a page, wherein the page includes a plurality of memory cells connected to even bitlines and odd bitlines of the flash memory, and the memory cells are disposed in a plurality of sectors. The semiconductor memory device also includes a memory controller configured to provide the flash memory with a read address that identifies sectors to be read. The flash memory is configured to determine a sequence of even sensing and odd sensing based on the read address and perform the even sensing and the odd sensing according to the determined sequence. In addition, the flash memory is configured to sense data of at least one identified sector that includes memory cells connected to the even bitlines during the even sensing and sense data of at least one identified sector that includes memory cells connected to the odd bitlines during the odd sensing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.