Patent · US Active

Selectively isolating processor elements into subsets of processor elements

US8532288B2 · kind B2 · utility

0Cited by

22References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Camil Fayad · Poughkeepsie, US
John K. Li · Woodstock, US
Siegfried Sutter · Eppelheim, DE
Phil C. Yeh · Poughkeepsie, US

Key dates

Filing date	Dec 1, 2006
Grant date	Sep 10, 2013
Priority date	—
Expiry date	Apr 5, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F2207/382
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A cryptographic engine for modulo N multiplication, which is structured as a plurality of almost identical, serially connected Processing Elements, is controlled so as to accept input in blocks that are smaller than the maximum capability of the engine in terms of bits multiplied at one time. The serially connected hardware is thus partitioned on the fly to process a variety of cryptographic key sizes while still maintaining all of the hardware in an active processing state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.