Method and apparatus for inserting faults to test code paths
US8533679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2007 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Jan 11, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that inserts faults to test code paths. The system starts by placing fault-inserting method calls at join points within methods in program code. The system then executes the program code during a testing process. As a method is executed during the testing process, the system executes the corresponding fault-inserting method. This fault-inserting method checks a configuration database to determine whether a fault is to be simulated for the method and, if so, simulates a fault for the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.