Method and circuit for an operating area limiter
US8536933B2 · kind B2 · utility
1Cited by
7References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2012 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Mar 21, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/561
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The present invention relates to circuits and methods for limiting the operating area of a transistor in a constant current source. The circuits and methods use a detector and a driver to limit the operating area of a transistor. The detector and driver have parameters selected so that, when the voltage at the drain of the transistor satisfies a reference condition, the driver causes drain current of the transistor to decrease. The reference condition is determined relative to the maximum safe drain-to-source voltage at the design drain current of the constant current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.