Method and control board for eliminating power-off residual images in display and display using the same
US8537150B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Jun 10, 2009 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Feb 17, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0257
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and a control board for eliminating power-off residual images in a display and a display using the same are provided. The method includes the following steps of providing a first voltage to compensate a second voltage which is used for sequentially turning on all scan lines within a display panel when the display is in power-off, and then forming a third voltage to turn on all scan lines within the display panel according to the compensated second voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.