Exponential-logarithmic analog-to-digital converter
US8542140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2012 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Jan 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital converter by using an exponential-logarithmic model includes an exponential circuit which acquires an analog input voltage and generates an analog output voltage that is an exponential function of the input voltage. A positive feedback circuit that succeeds the exponential circuit exhibits a natural logarithmic characteristic. A comparator is connected to the positive feedback circuit to compare an output voltage of the positive feedback circuit with a reference voltage. Via the exponential-logarithmic conversion technique, the time interval or pulse produced by the positive feedback circuit is a linear function of the magnitude of the input voltage. Based on the comparator output, a counter is employed to translate the analog input signal to its digital representation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.