Display driving circuit gate driver with shift register stages
US8542178B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2010 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Nov 27, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display driving circuit is provided. The display driving circuit, in which a gate driver shifting and outputting an input signal is embedded, includes an input portion receiving a pulse input signal consisting of a high-level signal and a low-level signal and transferring the pulse input signal to a boosting node, an inverter portion connected with the input portion, and inverting the pulse input signal to output the inverted signal, and a pull-up/pull-down portion consisting of a pull-up portion connected to the input portion, receiving a boosting voltage from the boosting node, and outputting a pull-up output signal, and a pull-down portion connected to the inverter portion, receiving the inverted signal, and outputting a pull-down output signal. Here, the inverter portion outputs a signal having a lower level than the low-level signal for a predetermined time period in which the pull-up output signal is output. Accordingly, the display driving circuit exhibits excellent output characteristics due to improved performance and also has excellent reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.