Low latency cadence detection for frame rate conversion
US8542747B2 · kind B2 · utility
3Cited by
1References
27Claims
0Family size
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Key dates
| Filing date | Dec 26, 2006 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Jun 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A frame rate converter sequentially buffers video frames in a sequence of video frames in a buffer and interpolates at least two of the plurality of video frames in the buffer based on at least one interpolation parameter, to form interpolated output frames. Conveniently, the interpolation parameter is adjusted with each newly buffered frame in dependence on the current value of the cadence of the frame sequence. In this way, delays associated with cadence detection may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.