Electrode arrays and methods of fabricating the same using printing plates to arrange particles in an array
US8546257B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2012 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Jul 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01079
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Electrode arrays and methods of fabricating the same using a printing plate to arrange conductive particles in alignment with an array of electrodes are provided. In one embodiment, a semiconductor device comprises: a semiconductor topography comprising an array of electrodes disposed upon a semiconductor substrate; a dielectric layer residing upon the semiconductor topography; and at least one conductive particle disposed in or on the dielectric layer in alignment with at least one of the array of electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.