Off-set top pixel electrode configuration
US8546807B2 · kind B2 · utility
4Cited by
2References
20Claims
0Family size
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Inventors
Key dates
| Filing date | Apr 27, 2009 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Dec 2, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/311
Abstract
A semiconductor device architecture where the top pixel electrode is deposited in an off-set configuration, such as to overlap the COM electrode, and also the gate electrode of the neighboring device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.