Configurable processing apparatus and system thereof
US8549258B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2010 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Mar 24, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3889
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A configurable processing apparatus includes a plurality of processing units, at least an instruction synchronization control circuit, and at least a configuration memory. Each processing apparatus has a stall-output signal generating circuit to output a stall-output signal, wherein the stall-output signal indicates that an unexpected stall is occurred in the processing unit. The processing unit has a stall-in signal, and an external circuit of the processing unit can control whether the processing unit is stalled according to the stall-in signal. The instruction synchronization control circuit generates the stall-in signals to the processing units in response to a content stored in the configuration memory and the stall-output signals of the processing units, so as to determine operation modes and instruction synchronization of the processing units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.