System power management using memory throttle signal
US8549329B2 · kind B2 · utility
2Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Dec 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3058
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.