Stability methods and structures for current-mode DC-DC voltage converters
US8552706B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2011 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Nov 10, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
DC-DC voltage converter structures and methods are provided that employ first and second transistors which are switched to control currents through an inductor and a capacitor to thereby provide an output voltage substantially equal to a predetermined reference voltage. Preferably included is a voltage feedback loop in which an error voltage is fed back to a loop comparator and further included is a current feedback loop that provides to the comparator a first voltage ramp whose amplitude is proportional to the amplitude of the converter's input current. The output signal of the comparator sets the duty cycles of the first and second transistors. In each converter period, the first and second transistors of the voltage converter respectively control, through the inductor, a first current with a rising slope and a second current with a falling slope. Finally, converter stability is enhanced by providing a second voltage ramp having a slope related to a fraction (e.g., ½) of the falling slope and then comparing the error voltage of the voltage feedback loop to the sum of the first and second voltage ramps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.