Sigma-delta modulator for reducing power consumption and suitable for high-speed operations
US8552895B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 2010 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Dec 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/464
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a sigma-delta modulator, including an integration circuit, a first DAC unit, and a second DAC unit. The integration circuit includes first and second terminals, and integrates a voltage supplied via the first terminal. The first DAC unit alternately supplies a first voltage obtained at one end of a first resistor to the first terminal and the second terminal. The second DAC unit alternately supplies a second voltage at the other end of a second resistor to the second terminal or the first terminal. The second DAC unit supplies the second voltage to the second terminal when the first DAC unit supplies the first voltage to the first terminal. The second DAC unit supplies the second voltage to the first terminal when the first DAC unit supplies the first voltage to the second terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.