Memory device and memory access method
US8553443B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Jan 25, 2012 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Jan 25, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a memory device in which the circuit structure is simplified while the functions of a memory including an OTP memory and a memory including a pseudo-MTP memory are maintained. A memory device includes a plurality of memory sets each including a mark bit storage area for storing a mark bit, which indicates that an object is deleted data, and a data bit storage area for storing data, the memory device being built from an OTP memory including an OTP memory block and a pseudo-MTP memory block, the OTP memory block containing a given number of memory sets to operate as an OTP memory, the pseudo-MTP memory block containing the rest of the memory sets operates as a pseudo-MTP memory. The mark bit is written in advance in the mark bit storage area of the OTP memory block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.